﻿
@article{
3d-AFG+05,
   Author = {Ababei, Cristinel and Feng, Yan and Goplen, Brent and Mogal, Hushrav and Zhang, Tianpei and Bazargan, Kia and Sapatnekar, Sachin S.},
   Title = {Placement and Routing in 3D Integrated Circuits},
   Journal = {IEEE Design and Test of Computers},
   Volume = {22},
   Number = {6},
   Pages = {520- 531},
   Year = {2005} }




@inproceedings{
3d-AB04,
   Author = {Ababei, C. and K. Bazargan},
   Title = {Exploring Potential Benefits of 3D FPGA Integration},
   BookTitle = {Field-Programmable Logic and its Applications},
   Year = {2004} }




@inproceedings{
3d-AMB05,
   Author = {Ababei, C. and Mogal, H. and Bazargan, K.},
   Title = {Three-dimensional Place and Route for FPGAs},
   BookTitle = {Asia South-Pacific Design Automation Conference},
   Pages = {773 - 778},
   Year = {2005} }




@article{
3D:AMB06,
   Author = {Ababei, C. and Mogal, H. and Bazargan, K.},
   Title = {Three-Dimensional Place and Route for FPGAs},
   Journal = {Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on},
   Volume = {25},
   Number = {6},
   Pages = {1132-1140},
   Year = {2006} }




@inproceedings{
3D:AHK+00,
   Author = {Agarwal, V. and Hrishikesh, M. S. and Keckler, S. W. and Burger, D.},
   Title = {Clock rate versus IPC: the end of the road for conventional microarchitectures},
   BookTitle = {Computer Architecture, 2000. Proceedings of the 27th International Symposium on },
   Pages = {248-259},
   Year = {2000} }




@inproceedings{
3D:AGT+04,
   Author = {Alam, S. M. and Gan Chee, Lip and Thompson, C. V. and Troxel, D. E.},
   Title = {Circuit level reliability analysis of Cu interconnects},
   BookTitle = {Quality Electronic Design, 2004. Proceedings. 5th International Symposium on },
   Pages = {238-243},
   Year = {2004} }




@inproceedings{
3D:ATT02,
   Author = {Alam, S. M. and Troxel, D. E. and Thompson, C. V.},
   Title = {A comprehensive layout methodology and layout-specific circuit analyses for three-dimensional integrated circuits},
   BookTitle = {Quality Electronic Design, 2002. Proceedings. International Symposium on },
   Pages = {246-251},
   Year = {2002} }




@inproceedings{
3D:AK97,
   Author = {Albonesi, D. H. and Koren, I.},
   Title = {Improving the memory bandwidth of highly-integrated, wide-issue, microprocessor-based systems},
   BookTitle = {Parallel Architectures and Compilation Techniques., 1997. Proceedings. 1997 International Conference on },
   Pages = {126-135},
   Year = {1997} }




@inproceedings{
3D:ABC93,
   Author = {Alexander, M. A. and Bailey, M. W. and Childers, B. R. and Davidson, J. W. and Jinturkar, S.},
   Title = {Memory bandwidth optimizations for wide-bus machines},
   BookTitle = {System Sciences, 1993, Proceeding of the Twenty-Sixth Hawaii International Conference on },
   Volume = {i},
   Pages = {466-475 vol.1},
   Year = {1993} }




@inproceedings{
3D:ACC+95,
   Author = {Alexander, M. J. and Cohoon, J. P. and Colflesh, J. L. and Karro, J. and Robins, G.},
   Title = {Three-dimensional field-programmable gate arrays},
   BookTitle = {ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International },
   Pages = {253-256},
   Year = {1995} }




@inproceedings{
3D:BWF+07,
   Author = {Balaji, Vaidyanathan and Wei-Lun, Hung and Feng, Wang and Yuan, Xie and Vijaykrishnan, Narayanan and Mary Jane, Irwin},
   Title = {Architecting Microprocessor Components in 3D Design Space},
   BookTitle = {VLSI Design},
   Pages = {103-108},
   Year = {2007} }




@article{
3D:BSK+01,
   Author = {Banerjee, K. and Souri, S. J. and Kapur, P. and Saraswat, K. C.},
   Title = {3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration},
   Journal = {Proceedings of the IEEE},
   Volume = {89},
   Number = {5},
   Pages = {602-633},
   Year = {2001} }




@article{
3D:kerry-EDA06,
   Author = {Bernstein, Kerry},
   Title = {New Dimension in Performance},
   Journal = {EDA Forum},
   Volume = {3},
   Number = {2},
   Year = {2006} }




@inproceedings{
3D:KPJ+07,
   Author = {Bernstein, Kerry and Andry, Paul and Cann, Jerome and Emma, Phil and Greenberg, David and Haensch, Wilfried and Ignatowski, Mike and Koester, Steve and Magerlein, John and Puri, Ruchir and Young, Albert},
   Title = {Interconnects in the third dimension: design challenges for 3D ICs},
   BookTitle = {DAC},
   Pages = {562-567},
   Year = {2007} }




@article{
3D:M5,
   Author = {Binkert, N. L. and Dreslinski, R. G. and Hsu, L. R. and Lim, K. T. and Saidi, A. G. and Reinhardt, S. K.},
   Title = {The M5 Simulator: Modeling Networked Systems},
   Journal = {IEEE Micro},
   Volume = {26},
   Number = {4},
   Pages = {52-60},
   Year = {2006} }




@inproceedings{
3D:BMN+06,
   Author = {Black, Bryan and Annavaram, Murali and Brekelbaum, Ned and DeVale, John and Jiang, Lei and Loh, Gabriel H. and McCaule, Don and Morrow, Pat and Nelson, Donald W. and Pantuso, Daniel and Reed, Paul and Rupley, Jeff and Shankar, Sadasivan and Shen, John and Webb, Clair},
   Title = {Die Stacking (3D) Microarchitecture},
   BookTitle = {MICRO},
   Pages = {469-479},
   Year = {2006} }




@inproceedings{
3D:BNW+04,
   Author = {Black, B. and Nelson, D. W. and Webb, C. and Samra, N.},
   Title = {3D processing technology and its impact on iA32 microprocessors},
   BookTitle = {Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on },
   Pages = {316-318},
   Year = {2004} }




@article{
3D:Mambo,
   Author = {Bohrer, Patrick and Peterson, James and Elnozahy, Mootaz and Rajamony, Ram and Gheith, Ahmed and Rockhold, Ron and Lefurgy, Charles and Shafi, Hazim and Nakra, Tarun and Simpson, Rick and Speight, Evan and Sudeep, Kartik and Hensbergen, Eric Van and Zhang, Lixin},
   Title = {Mambo: a full system simulator for the PowerPC architecture},
   Journal = {ACM SIGMETRICS Performance Evaluation Review},
   Volume = {31},
   Number = {4},
   Pages = {8-12},
   Year = {2004} }




@article{
3D:BGK97,
   Author = {Burger, D. and Goodman, J. R. and Kagi, A.},
   Title = {Limited bandwidth to affect processor design},
   Journal = {Micro, IEEE},
   Volume = {17},
   Number = {6},
   Pages = {55-62},
   Year = {1997} }




@inproceedings{
3D:CAR96,
   Author = {Carson, J.},
   Title = {The emergence of stacked 3D silicon and its impact on microelectronics systems integration},
   BookTitle = {Innovative Systems in Silicon, 1996. Proceedings., Eighth Annual IEEE International Conference on},
   Pages = {1-8},
   Year = {1996} }




@article{
3D:many-core,
   Author = {Cavin, R. and Hutchby, J. A. and Zhirnov, V. and Brewer, J. E. and Bourianoff, G.},
   Title = {Emerging Research Architectures},
   Journal = {Computer},
   Volume = {41},
   Number = {5},
   Pages = {33-37},
   Year = {2008} }




@article{
3D:CFT+04,
   Author = {Chen, K. N. and Fan, A. and Tan, C. S. and Reif, R.},
   Title = {Contact resistance measurement of bonded copper interconnects for three-dimensional integration technology},
   Journal = {Electron Device Letters, IEEE},
   Volume = {25},
   Number = {1},
   Pages = {10-12},
   Year = {2004} }




@inproceedings{
3D:CV98,
   Author = {Chiricescu, S. M. S. A. and Vai, M. M.},
   Title = {A three-dimensional FPGA with an integrated memory for in-application reconfiguration data},
   BookTitle = {Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on },
   Volume = {2},
   Pages = {232-235 vol.2},
   Year = {1998} }




@inproceedings{
3D:JAY+06,
   Author = {Cong, Jason and Jagannathan, Ashok and Ma, Yuchun and Reinman, Glenn and Wei, Jie and Zhang, Yan},
   Title = {An automated design flow for 3D microarchitecture evaluation},
   BookTitle = {ASPDAC},
   Pages = {384-389},
   Year = {2006} }




@article{
3D:CRI97,
   Author = {Crisp, R.},
   Title = {Direct RAMbus technology: the new main memory standard},
   Journal = {Micro, IEEE},
   Volume = {17},
   Number = {6},
   Pages = {18-28},
   Year = {1997} }




@inproceedings{
3D:DCR03,
   Author = {Das, S. and Chandrakasan, A. and Reif, R.},
   Title = {Design tools for 3-D integrated circuits},
   BookTitle = {Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific },
   Pages = {53-56},
   Year = {2003} }




@inproceedings{
3D:DCR03,
   Author = {Das, S. and Chandrakasan, A. and Reif, R.},
   Title = {Three-dimensional integrated circuits: performance, design methodology, and CAD tools},
   BookTitle = {VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on },
   Pages = {13-18},
   Year = {2003} }




@article{
3D:DCR04,
   Author = {Das, S. and Chandrakasan, A. P. and Reif, R.},
   Title = {Calibration of Rent's rule models for three-dimensional integrated circuits},
   Journal = {Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
   Volume = {12},
   Number = {4},
   Pages = {359-366},
   Year = {2004} }




@article{
3d-DWM+05,
   Author = {Davis, W. Rhett and Wilson, John and Mick, Stephen and Xu, Jian and Hua, Hao and Mineo, Christopher and Sule, Ambarish M. and Steer, Michael and Franzon, Paul D.},
   Title = {Demystifying 3D ICs: the Pros and Cons of Going Vertical},
   Journal = {IEEE Design and Test of Computers},
   Volume = {22},
   Number = {6},
   Pages = {498- 510},
   Year = {2005} }




@inproceedings{
3D:DM03,
   Author = {Deng, Y. and Maly, W.},
   Title = {A feasibility study of 2.5D system integration},
   BookTitle = {Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003 },
   Pages = {667-670},
   Year = {2003} }




@inproceedings{
3D:DM03_1,
   Author = {Deng, Y. S. and Maly, W.},
   Title = {Physical design of the "2.5D" stacked system},
   BookTitle = {Computer Design, 2003. Proceedings. 21st International Conference on },
   Pages = {211-217},
   Year = {2003} }




@article{
3D:WLF+08,
   Author = {Dong Hyuk, Woo and Lee, H. H. S. and Fryman, J. B. and Knies, A. D. and Eng, M.},
   Title = {POD: A 3D-Integrated Broad-Purpose Acceleration Layer},
   Journal = {Micro, IEEE},
   Volume = {28},
   Number = {4},
   Pages = {28-40},
   Year = {2008} }




@inproceedings{
3D:DON88,
   Author = {Dongseung, Kim},
   Title = {Generalized Processor-Memory Bandwidth Analysis For Fully Shared-Memory Multiprocessors},
   BookTitle = {Signals, Systems and Computers, 1988. Twenty-Second Asilomar Conference on },
   Volume = {2},
   Pages = {617-621},
   Year = {1988} }




@inproceedings{
3D:ALM+06,
   Author = {Fazzi, A. and Magagni, L. and Dominicis, M. De and Zoffoli, P. and Canegallo, R. and Rolandi, P. L. and Sangiovanni-Vincentelli, A. and Guerrieri, R.},
   Title = {Yield prediction for 3D capacitive interconnections},
   BookTitle = {ICCAD},
   Pages = {809-814},
   Year = {2006} }




@inproceedings{
3D:FDS+08,
   Author = {Franzon, P. D. and Davis, W. R. and Steer, M. B. and Lipa, S. and Eun Chu, Oh and Thorolfsson, T. and Doxsee, T. and Berkeley, S. and Shani, B. and Obermiller, K.},
   Title = {Design and CAD for 3D integrated circuits},
   BookTitle = {Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE},
   Pages = {668-673},
   Year = {2008} }




@inproceedings{
3D:GCC+03,
   Author = {Garcia, J. and Corbal, J. and Cerda, L. and Valero, M.},
   Title = {Design and implementation of high-performance memory systems for future packet buffers},
   BookTitle = {Microarchitecture, 2003. MICRO-36. Proceedings. 36th Annual IEEE/ACM International Symposium on },
   Pages = {372-384},
   Year = {2003} }




@inproceedings{
3D:GEB01,
   Author = {Gebotys, C. H.},
   Title = {Utilizing memory bandwidth in DSP embedded processors},
   BookTitle = {Design Automation Conference, 2001. Proceedings },
   Pages = {347-352},
   Year = {2001} }




@article{
3D:GV97,
   Author = {Gillingham, P. and Vogley, B.},
   Title = {SLDRAM: high-performance, open-standard memory},
   Journal = {Micro, IEEE},
   Volume = {17},
   Number = {6},
   Pages = {29-39},
   Year = {1997} }




@inproceedings{
3D:GOE02,
   Author = {Goetz, M.},
   Title = {System on chip design methodology applied to system in package architecture},
   BookTitle = {Electronic Components and Technology Conference, 2002. Proceedings. 52nd },
   Pages = {254-258},
   Year = {2002} }




@inproceedings{
3D:GMV+04,
   Author = {Gomez, J. I. and Marchal, P. and Verdoorlaege, S. and Pinuel, L. and Catthoor, L.},
   Title = {Optimizing the memory bandwidth with loop morphing},
   BookTitle = {Application-Specific Systems, Architectures and Processors, 2004. Proceedings. 15th IEEE International Conference on },
   Pages = {213-223},
   Year = {2004} }




@inproceedings{
   Author = {Goplen, B. and Sapatnekar, S.},
   Title = {Efficient thermal placement of standard cells in 3D ICs using a force directed approach},
   Pages = {86-89},
   Year = {2003} }




@inproceedings{
3d-GS03,
   Author = {Goplen, B. and Sapatnekar, S. S.},
   Title = {Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach,},
   BookTitle = {International Conference on Computer-Aided Design},
   Pages = {86-89},
   Year = {2003} }




@inproceedings{
3d-GS05,
   Author = {Goplen, B. and Sapatnekar, S. S.},
   Title = {Thermal Via Placement in 3D ICs,},
   BookTitle = {International Symposium on Physical Design},
   Pages = {167-174},
   Year = {2004} }




@article{
   Author = {Goplen, B. and Sapatnekar, S. S.},
   Title = {Placement of Thermal Vias in 3D ICs using Various Thermal Objectives},
   Journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
   Year = {2005} }




@inproceedings{
3D:BS07,
   Author = {Goplen, Brent and Spatnekar, Sachin},
   Title = {Placement of 3D ICs with thermal and interlayer via considerations},
   BookTitle = {DAC},
   Pages = {626-631},
   Year = {2007} }




@inproceedings{
3D:IBM-DAC08,
   Author = {Haensch, W.},
   Title = {Why should we do 3D integration?},
   BookTitle = {Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE},
   Pages = {674-675},
   Year = {2008} }




@article{
3D:HLV84,
   Author = {Hoefflinger, B. and Liu, S. T. and Vajdic, B.},
   Title = {A three-dimensional CMOS design methodology},
   Journal = {Electron Devices, IEEE Transactions on},
   Volume = {31},
   Number = {2},
   Pages = {171-173},
   Year = {1984} }




@inproceedings{
3D:HCK+06,
   Author = {Hua, Hao and Mineo, Chris and Schoenfliess, Kory and Sule, Ambarish and Melamed, Samson and Jenkal, Ravi and Davis, W. Rhett},
   Title = {Exploring compromises among timing, power and temperature in three-dimensional integrated circuits},
   BookTitle = {DAC},
   Pages = {997-1002},
   Year = {2006} }




@inproceedings{
3D:HLY+06,
   Author = {Hung, W. L. and Link, G. M. and Yuan, Xie and Vijaykrishnan, N. and Irwin, M. J.},
   Title = {Interconnect and thermal-aware floorplanning for 3D microprocessors},
   BookTitle = {International Symposium on Quality Electronic Design},
   Pages = {6 pp.},
   Year = {2006} }




@article{
3d-JEZ05,
   Author = {Jacob, P and Erdogan, O. and Zia, A. and Belemjian, P.M. and Kraft, R.P and McDonald, J.F.},
   Title = {Predicting the Performance of a 3D Processor-memory Chip Stack},
   Journal = {IEEE Design and Test of Computers},
   Volume = {22},
   Number = {6},
   Pages = {540- 547},
   Year = {2005} }




@article{
   Author = {Jacob, P and Zia, A.},
   Year = {} }




@article{
3D:JZE+2008,
   Author = {Jacob, P and Zia, A. and Erdogan, O. and Belemjian, P.M. and Kim, J. and Chu, M. and Kraft, R.P and McDonald, J.F. and Bernstein, K.},
   Title = {Mitigating Memory Wall Effects in High Clock Rate and Multi-core CMOS 3D ICs: Processor Memory Stacks},
   Journal = {Proceedings of IEEE},
   Volume = {96},
   Number = {10},
   Year = {2008} }




@inproceedings{
3D:JSV03,
   Author = {Jahangir, Hasan and Satish, Chandra and Vijaykumar, T. N.},
   Title = {Efficient use of memory bandwidth to improve network processor throughput},
   BookTitle = {Computer Architecture, 2003. Proceedings. 30th Annual International Symposium on },
   Pages = {300-311},
   Year = {2003} }




@inproceedings{
3D:Jain08,
   Author = {Jain, A. and Jones, R. E. and Chatterjee, R. and Pozder, S. and Zhihong, Huang},
   Title = {Thermal modeling and design of 3D integrated circuits},
   BookTitle = {Thermal and Thermomechanical Phenomena in Electronic Systems, 2008. ITHERM 2008. 11th Intersociety Conference on},
   Pages = {1139-1145},
   Year = {2008} }




@inproceedings{
3D:JM02,
   Author = {Joyner, J. W. and Meindl, J. D.},
   Title = {Opportunities for reduced power dissipation using three-dimensional integration},
   BookTitle = {Interconnect Technology Conference, 2002. Proceedings of the IEEE 2002 International },
   Pages = {148-150},
   Year = {2002} }




@article{
3D:JVZ+01,
   Author = {Joyner, J. W. and Venkatesan, R. and Zarkesh-Ha, P. and Davis, J. A. and Meindl, J. D.},
   Title = {Impact of three-dimensional architectures on interconnects in gigascale integration},
   Journal = {Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
   Volume = {9},
   Number = {6},
   Pages = {922-928},
   Year = {2001} }




@article{
3D:KAT97,
   Author = {Katayama, Y.},
   Title = {Trends in semiconductor memories},
   Journal = {Micro, IEEE},
   Volume = {17},
   Number = {6},
   Pages = {10-17},
   Year = {1997} }




@inproceedings{
3D:TSA+07,
   Author = {Kgil, Taeho and D'Souza, Shaun and Saidi, Ali and Binkert, Nathan and Dreslinski, Ronald and Mudge, Trevor and Reinhardt, Steven and Flautner, Krisztian},
   Title = {PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor},
   BookTitle = {ASPLOS},
   Pages = {117-128},
   Year = {2006} }




@inproceedings{
3D:KZR04,
   Author = {Khalid, A. U. and Zilic, Z. and Radecka, K.},
   Title = {FPGA emulation of quantum circuits},
   BookTitle = {Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on},
   Pages = {310-315},
   Year = {2004} }




@inproceedings{
3D:JCD+07,
   Author = {Kim, J. and Nicopoulos, C.A. and Park, D. and Das, R. and Xie, Y. and Vijaykrishnan, N. and Das, C.R. },
   Title = {A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures},
   BookTitle = {ISCA},
   Year = {2007} }




@article{
3D:KVK+05h,
   Author = {Kim, S. and Vijaykrishnan, N. and Kandemir, M. and Irwin, M. J.},
   Title = {Exploiting temporal loads for low latency and high bandwidth memory},
   Journal = {Computers and Digital Techniques, IEE Proceedings-},
   Volume = {152},
   Number = {4},
   Pages = {457-466},
   Year = {2005} }




@inproceedings{
3D:KMW+03,
   Author = {Klumpp, A. and Merkel, R. and Wieland, R. and Ramm, P.},
   Title = {Chip-to-wafer stacking technology for 3D system integration},
   BookTitle = {Electronic Components and Technology Conference, 2003. Proceedings. 53rd },
   Pages = {1080-1083},
   Year = {2003} }




@inproceedings{
3D:KK05,
   Author = {Koukis, E. and Koziris, N.},
   Title = {Memory bandwidth aware scheduling for SMP cluster nodes},
   BookTitle = {Parallel, Distributed and Network-Based Processing, 2005. PDP 2005. 13th Euromicro Conference on },
   Pages = {187-196},
   Year = {2005} }




@article{
3D:KKB04,
   Author = {Kuan-Neng, Chen and Kobrinsky, M. J. and Barnett, B. C. and Reif, R.},
   Title = {Comparisons of conventional, 3-D, optical, and RF interconnects for on-chip clock distribution},
   Journal = {Electron Devices, IEEE Transactions on},
   Volume = {51},
   Number = {2},
   Pages = {233-239},
   Year = {2004} }




@article{
3D:KOI95,
   Author = {Kumanoya, M. and Ogawa, T. and Inoue, K.},
   Title = {Advances in DRAM interfaces},
   Journal = {Micro, IEEE},
   Volume = {15},
   Number = {6},
   Pages = {30-36},
   Year = {1995} }




@inproceedings{
3D:KNH+04,
   Author = {Kun-Bin, Lee and Nelson Yen-Chung, Chang and Hao-Yun, Chin and Hui-Cheng, Hsu and Chein-Wei, Jen},
   Title = {A bandwidth and memory efficient MPEG-4 shape encoder},
   BookTitle = {Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific },
   Pages = {525-526},
   Year = {2004} }




@article{
3D:LJB+99,
   Author = {Lea, R. M. and Jalowiecki, I. P. and Boughton, D. K. and Yamaguchi, J. S. and Pepe, A. A. and Ozguz, V. H. and Carson, J. C.},
   Title = {A 3-D stacked chip packaging solution for miniaturized massively parallel processing},
   Journal = {Advanced Packaging, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on]},
   Volume = {22},
   Number = {3},
   Pages = {424-432},
   Year = {1999} }




@inproceedings{
3D:Led08,
   Author = {Leduc, P. and Di Cioccio, L. and Charlet, B. and Rousseau, M. and Assous, M. and Bouchu, D. and Roule, A. and Zussy, M. and Gueguen, P. and Roman, A. and Rozeau, O. and Heitzmann, M. and Nieto, J. P. and Vandroux, L. and Haumesser, P. H. and Quenouillere, R. and Toffoli, A. and Sixt, P. and Maitrejean, S. and Clavelier, L. and Sillon, N.},
   Title = {Enabling technologies for 3D chip stacking},
   BookTitle = {VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on},
   Pages = {76-78},
   Year = {2008} }




@article{
3D:LMV+98,
   Author = {Leeser, M. and Meleis, W. M. and Vai, M. M. and Chiricescu, S. and Weidong, Xu and Zavracky, P. M.},
   Title = {Rothko: a three-dimensional FPGA},
   Journal = {IEEE Design and Test of Computers},
   Volume = {15},
   Number = {1},
   Pages = {16-23},
   Year = {1998} }




@article{
3D:LLH+03,
   Author = {Lei, Xue and Liu, C. C. and Hong-Seung, Kim and Kim, S. K. and Tiwari, S.},
   Title = {Three-dimensional integration: technology, use, and issues for mixed-signal applications},
   Journal = {Electron Devices, IEEE Transactions on},
   Volume = {50},
   Number = {3},
   Pages = {601-609},
   Year = {2003} }




@inproceedings{
3D:FCT+06,
   Author = {Li, Feihui and Nicopoulos, Chrysostomos and Richardson, Thomas and Xie, Yuan and Narayanan, Vijaykrishnan and Kandemir, Mahmut},
   Title = {Design and Management of 3D Chip Multiprocessors Using Network-in-Memory},
   BookTitle = {ISCA},
   Pages = {130-141},
   Year = {2006} }




@article{
3D:LIH80,
   Author = {Li, H. F.},
   Title = {Bandwidth of fast memory in multiprocessing},
   Journal = {Proceedings of the IEEE},
   Volume = {68},
   Number = {5},
   Pages = {630-632},
   Year = {1980} }




@inproceedings{
3D:ZXQ+06,
   Author = {Li, Zhuoyuan and Hong, Xianlong and Zhou, Qiang and Zeng, Shan and Bian, Jinian and Yang, Hannah and Pitchumani, Vijay and Cheng, Chung-Kuan},
   Title = {Integrating dynamic thermal via planning with 3D floorplanning algorithm},
   BookTitle = {ISPD},
   Pages = {178-185},
   Year = {2006} }




@article{
3d-Lim,
   Author = {Lim, S.K.},
   Title = {Physical Design for 3D System on Package},
   Journal = {IEEE Design and Test of Computers},
   Volume = {22},
   Number = {6},
   Pages = {532- 539},
   Year = {2005} }




@inproceedings{
3D:MA07,
   Author = {Lin, Mingjie and Gamal, Abbas El},
   Title = {A Routing Fabric for Monolithically Stacked 3D-FPGA },
   BookTitle = {Proceedings of the International Symposium on Field Programmable Gate Arrays},
   Pages = {1-10},
   Year = {2007} }




@inproceedings{
3D:MAY+06,
   Author = {Lin, Mingjie and Gamal, Abbas El and Lu, Yi-chang and Wong, Simon},
   Title = {Performance Benefits of Monolithically Stacked 3D-FPGA},
   BookTitle = {Proceedings of the International Symposium on Field Programmable Gate Arrays},
   Pages = {113-122},
   Year = {2006} }




@article{
3D:MAY+07,
   Author = {Lin, Mingjie and Gamal, Abbas El and Lu, Yi-chang and Wong, Simon},
   Title = {Performance Benefits of Monolithically Stacked 3D-FPGA },
   Journal = {IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems},
   Volume = {26},
   Number = {2},
   Year = {2007} }




@article{
3D:MT02,
   Author = {Lin, Mingjie and Wang, Ting},
   Title = {A Novel 3-D Transient Liquid Crystal Method for Numerical Fluid Dynamics Computation },
   Journal = {International Journal of Heat and Mass Transfer},
   Volume = {45},
   Number = {17},
   Pages = {3491-3501},
   Year = {2002} }




@article{
3D:MT05,
   Author = {Lin, Mingjie and Wang, Ting},
   Title = {Flow and Heat Transfer of Confined Impingement Jets Cooling using a 3-D Transient Liquid Crystal Scheme },
   Journal = {International Journal of Heat and Mass Transfer},
   Volume = {48},
   Number = {23-24},
   Pages = {4887-4903},
   Year = {2005} }




@inproceedings{
3D:hs3d,
   Author = {Link, G. M. and Vijaykrishnan, N.},
   Title = {Thermal Trends in Emerging Technologies},
   Pages = {625-632},
   Year = {2006} }




@article{
3d-LGB+05,
   Author = {Liu, C.C. and Ganusov, I. and Burtscher, M. and Tiwari, Sandip},
   Title = {Bridging the Processor-memory Performance Gap with 3D IC Technology},
   Journal = {IEEE Design and Test of Computers},
   Volume = {22},
   Number = {6},
   Pages = {556- 564},
   Year = {2005} }




@inproceedings{
3D:Loh08,
   Author = {Loh, G. H.},
   Title = {3D-Stacked Memory Architectures for Multi-core Processors},
   BookTitle = {Computer Architecture, 2008. ISCA '08. 35th International Symposium on},
   Pages = {453-464},
   Year = {2008} }




@article{
3D:LXB07,
   Author = {Loh, Gabriel H. and Xie, Yuan and Black, Bryan},
   Title = {Processor Design in 3D Die-Stacking Technologies},
   Journal = {IEEE Micro},
   Volume = {27},
   Number = {3},
   Pages = {31-48},
   Year = {2007} }




@inproceedings{
3D:LAS+06,
   Author = {Loi, G. L. and Agrawal, B. and Srivastava, N. and Sheng-Chih, Lin and Sherwood, T. and Banerjee, K.},
   Title = {A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy},
   BookTitle = {Design Automation Conference, 2006 43rd ACM/IEEE},
   Pages = {991-996},
   Year = {2006} }




@article{
3D:MS94,
   Author = {Mahmud, S. M. and Samaratunga, L. T.},
   Title = {Memory bandwidth analysis of hierarchical multiprocessors using model decomposition and steady-state flow analysis},
   Journal = {Parallel and Distributed Systems, IEEE Transactions on},
   Volume = {5},
   Number = {5},
   Pages = {553-560},
   Year = {1994} }




@inproceedings{
3D:Mak06,
   Author = {Mak, T. M.},
   Title = {Test challenges for 3D circuits},
   BookTitle = {On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International},
   Pages = {1 pp.},
   Year = {2006} }




@inproceedings{
3D:MAN01,
   Author = {Mansun, Chan},
   Title = {The potential and realization of multi-layers three-dimensional integrated circuit},
   BookTitle = {Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on },
   Volume = {1},
   Pages = {40-45 vol.1},
   Year = {2001} }




@inproceedings{
3D:MCG04,
   Author = {Marchal, P. and Catthoor, F. and Gomez, J. I.},
   Title = {Optimizing the memory bandwidth with loop fusion},
   BookTitle = {Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004. International Conference on },
   Pages = {188-193},
   Year = {2004} }




@article{
3D:MHH+03,
   Author = {Margomenos, A. and Herrick, K. J. and Herman, M. I. and Valas, S. and Katehi, L. P. B.},
   Title = {Isolation in three-dimensional integrated circuits},
   Journal = {Microwave Theory and Techniques, IEEE Transactions on},
   Volume = {51},
   Number = {1},
   Pages = {25-32},
   Year = {2003} }




@inproceedings{
3D:MGC+03,
   Author = {Meikei, Ieong and Guarini, K. W. and Chan, V. and Bernstein, K. and Joshi, R. and Kedzierski, J. and Haensch, W.},
   Title = {Three dimensional CMOS devices and integrated circuits},
   BookTitle = {Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003},
   Pages = {207-213},
   Year = {2003} }




@inproceedings{
3D:SBN+06,
   Author = {Mysore, Shashidhar and Agrawal, Banit and Srivastava, Navin and Lin, Sheng-Chih and Banerjee, Kaustav and Sherwood, Tim},
   Title = {Introspective 3D chips},
   BookTitle = {ASPLOS},
   Pages = {264-273},
   Year = {2006} }




@inproceedings{
3D:NFC+99,
   Author = {Nahman, A. and Fan, A. and Chung, J. and Reif, R.},
   Title = {Wire-length distribution of three-dimensional integrated circuits},
   BookTitle = {Interconnect Technology, 1999. IEEE International Conference },
   Pages = {233-235},
   Year = {1999} }




@article{
3D:NEU90,
   Author = {Neudeck, G. W.},
   Title = {Three-dimensional CMOS integration},
   Journal = {Circuits and Devices Magazine, IEEE},
   Volume = {6},
   Number = {5},
   Pages = {32-38},
   Year = {1990} }




@inproceedings{
3D:SR06,
   Author = {Peng, Song and Manohar, Rajit},
   Title = {Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology},
   BookTitle = {GLSVLSI},
   Pages = {159-164},
   Year = {2006} }




@inproceedings{
3D:PLX+08,
   Author = {Premachandran, C. S. and Lau, J. and Ling, Xie and Khairyanto, A. and Chen, K. and Myo Ei Pa, Pa and Chew, M. and Won Kyoung, Choi},
   Title = {A novel, wafer-level stacking method for low-chip yield and non-uniform, chip-size wafers for MEMS and 3D SIP applications},
   BookTitle = {Electronic Components and Technology Conference, 2008. ECTC 2008. 58th},
   Pages = {314-318},
   Year = {2008} }




@inproceedings{
3D:KG06,
   Author = {Puttaswamy, Kiran and Loh, Gabriel H.},
   Title = {Thermal analysis of a 3D die-stacked high-performance microprocessor},
   BookTitle = {GLSVLSI },
   Pages = {19-24},
   Year = {2006} }




@inproceedings{
3D:PL07,
   Author = {Puttaswamy, Kiran and Loh, Gabriel H.},
   Title = {Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors},
   BookTitle = {Design Automation Conference},
   Pages = {622-625},
   Year = {2007} }




@article{
3D:RDC+03,
   Author = {Rahman, A. and Das, S. and Chandrakasan, A. P. and Reif, R.},
   Title = {Wiring requirement and three-dimensional integration technology for field programmable gate arrays},
   Journal = {Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
   Volume = {11},
   Number = {1},
   Pages = {44-54},
   Year = {2003} }




@inproceedings{
3D:RFR00,
   Author = {Rahman, A. and Fan, A. and Reif, R.},
   Title = {Comparison of key performance metrics in two- and three-dimensional integrated circuits},
   BookTitle = {Interconnect Technology Conference, 2000. Proceedings of the IEEE 2000 International },
   Pages = {18-20},
   Year = {2000} }




@article{
3D:RR00,
   Author = {Rahman, A. and Reif, R.},
   Title = {System-level performance evaluation of three-dimensional integrated circuits},
   Journal = {Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
   Volume = {8},
   Number = {6},
   Pages = {671-678},
   Year = {2000} }




@inproceedings{
3D:RR01,
   Author = {Rahman, A. and Reif, R.},
   Title = {Thermal analysis of three-dimensional (3-D) integrated circuits (ICs)},
   BookTitle = {Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International },
   Pages = {157-159},
   Year = {2001} }




@inproceedings{
3D:TSV08,
   Author = {Ramm, P. and Wolf, M. J. and Klumpp, A. and Wieland, R. and Wunderle, B. and Michel, B. and Reichl, H.},
   Title = {Through silicon via technology: processes and reliability for wafer-level 3D system integration},
   BookTitle = {Electronic Components and Technology Conference, 2008. ECTC 2008. 58th},
   Pages = {841-846},
   Year = {2008} }




@inproceedings{
3D:RFK+02,
   Author = {Reif, R. and Fan, A. and Kuan-Neng, Chen and Das, S.},
   Title = {Fabrication technologies for three-dimensional integrated circuits},
   BookTitle = {Quality Electronic Design, 2002. Proceedings. International Symposium on },
   Pages = {33-37},
   Year = {2002} }




@inproceedings{
3D:MAS+07,
   Author = {Ricketts, Mosin Mondal
Andrew J. and Kirolos, Sami and Ragheb, Tamer and Link, Greg and Vijaykrishnan, N. and Massoud, Yehia},
   Title = {Thermally robust clocking schemes for 3D integrated circuits},
   BookTitle = {DATE},
   Pages = {1206-1211},
   Year = {2007} }




@article{
3D:RES93,
   Author = {Rose, J. and El Gamal, A. and Sangiovanni-Vincentelli, A.},
   Title = {Architecture of field-programmable gate arrays},
   Journal = {Proceedings of the IEEE},
   Volume = {81},
   Number = {7},
   Pages = {1013-1029},
   Year = {1993} }




@article{
3D:SAK97,
   Author = {Sakamura, K.},
   Title = {Guest Editor's Introduction: Advanced Dram Technology},
   Journal = {Micro, IEEE},
   Volume = {17},
   Number = {6},
   Pages = {8-9},
   Year = {1997} }




@inproceedings{
3D:SAC07,
   Author = {Sapatnekar, Sachin S},
   Title = {Computer-aided design of 3d integrated circuits},
   BookTitle = {GLSVLSI},
   Pages = {317-317},
   Year = {2007} }




@article{
3D:SSY97,
   Author = {Sase, I. and Shimizu, N. and Yoshikawa, T.},
   Title = {Multimedia LSI accelerator with embedded DRAM},
   Journal = {Micro, IEEE},
   Volume = {17},
   Number = {6},
   Pages = {49-54},
   Year = {1997} }




@inproceedings{
3D:SSA+08,
   Author = {Sharifi, A. and Sabbaghi-Nadooshan, R. and Sarbazi-Azad, H.},
   Title = {The Shuffle-Exchange Mesh Topology for 3D NoCs},
   BookTitle = {Parallel Architectures, Algorithms, and Networks, 2008. I-SPAN 2008. International Symposium on},
   Pages = {275-280},
   Year = {2008} }




@inproceedings{
3D:CLR07,
   Author = {Sun, Chong and Shang, Li and Dick, Robert P.},
   Title = {Three-dimensional multiprocessor system-on-chip thermal optimization},
   BookTitle = {CODES+ISSS},
   Pages = {117-122},
   Year = {2007} }




@inproceedings{
3D:TTT+04,
   Author = {Takahashi, K. and Taguchi, Y. and Tomisaka, M. and Yonemura, H. and Hoshino, M. and Ueno, M. and Egawa, Y. and Nemoto, Y. and Yamaji, Y. and Terao, H. and Umemoto, M. and Kameyama, K. and Suzuki, A. and Okayama, Y. and Yonezawa, T. and Kondo, K.},
   Title = {Process integration of 3D chip stack with vertical interconnection},
   BookTitle = {Electronic Components and Technology, 2004. ECTC '04. Proceedings },
   Volume = {1},
   Pages = {601-609 Vol.1},
   Year = {2004} }




@inproceedings{
   Author = {Ting-Yen, Chiang and Souri, S. J. and Chi On, Chui and Saraswat, K. C.},
   Title = {Thermal analysis of heterogeneous 3D ICs with various integration scenarios},
   Pages = {31.2.1-31.2.4},
   Year = {2001} }




@inproceedings{
3D:TKK+02,
   Author = {Tiwari, S. and Kim, H. S. and Kim, S. and Kumar, A. and Liu, C. C. and Xue, L.},
   Title = {Three-dimensional integration in silicon electronics},
   BookTitle = {High Performance Devices, 2002. Proceedings. IEEE Lester Eastman Conference on },
   Pages = {24-33},
   Year = {2002} }




@inproceedings{
3D:TFG+04,
   Author = {Topol, A. W. and Furman, B. K. and Guarini, K. W. and Shi, L. and Cohen, G. M. and Walker, G. F.},
   Title = {Enabling technologies for wafer-level bonding of 3D MEMS and integrated circuit structures},
   BookTitle = {Electronic Components and Technology, 2004. ECTC '04. Proceedings },
   Volume = {1},
   Pages = {931-938 Vol.1},
   Year = {2004} }




@article{
3D:intel80core,
   Author = {Vangal, S. R. and Howard, J. and Ruhl, G. and Dighe, S. and Wilson, H. and Tschanz, J. and Finan, D. and Singh, A. and Jacob, T. and Jain, S. and Erraguntla, V. and Roberts, C. and Hoskote, Y. and Borkar, N. and Borkar, S.},
   Title = {An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS},
   Journal = {Solid-State Circuits, IEEE Journal of},
   Volume = {43},
   Number = {1},
   Pages = {29-41},
   Year = {2008} }




@inproceedings{
3D:isca08-optical,
   Author = {Vantrease, D. and Schreiber, R. and Monchiero, M. and McLaren, M. and Jouppi, N. P. and Fiorentino, M. and Davis, A. and Binkert, N. and Beausoleil, R. G. and Ahn, J. H.},
   Title = {Corona: System Implications of Emerging Nanophotonic Technology},
   BookTitle = {Computer Architecture, 2008. ISCA '08. 35th International Symposium on},
   Pages = {153-164},
   Year = {2008} }




@techreport{
3D:simics,
   Author = {Virtutech},
   Title = {Simics 4.0 Datasheet},
   Institution = {Virtutech,  http://www.virtutech.com/},
      Year = {2008} }




@inproceedings{
3D:cadence-CTO,
   Author = {Vucurevich, T.},
   Title = {The Long Road to 3-D Integration: Are We There Yet?},
   BookTitle = {Keynote speech at the 3D Architecture Conference},
   Year = {2007} }




@inproceedings{
3D:WRT04,
   Author = {Wilkerson, P. and Raman, A. and Turowski, M.},
   Title = {Fast, automated thermal simulation of three-dimensional integrated circuits},
   BookTitle = {Thermal and Thermomechanical Phenomena in Electronic Systems, 2004. ITHERM '04. The Ninth Intersociety Conference on},
   Pages = {706-713 Vol.1},
   Year = {2004} }




@inproceedings{
3D:ES06,
   Author = {Wong, Eric and Lim, Sung Kyu},
   Title = {3D floorplanning with thermal vias},
   BookTitle = {DATE},
   Pages = {878-883},
   Year = {2006} }




@inproceedings{
3D:XPY07,
   Author = {Wu, X. and Falkenstern, P. and Xie, Y.},
   Title = {Scan chain design for Three-dimensional (3D) ICs},
   BookTitle = {ICCD},
   Year = {2007} }




@article{
3D:WCD+99,
   Author = {Wuytack, S. and Catthoor, F. and De Jong, G. and De Man, H. J.},
   Title = {Minimizing the required memory bandwidth in VLSI system realizations},
   Journal = {Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
   Volume = {7},
   Number = {4},
   Pages = {433-441},
   Year = {1999} }




@article{
3D:YPG+06,
   Author = {Xie, Y. and Loh, G. H. and Black, B. and Bernstein, K.},
   Title = {Design space exploration for 3D architectures},
   Journal = {J. Emerg. Technol. Comput. Syst.},
   Volume = {2},
   Number = {2},
   Pages = {65-103},
   Year = {2006} }




@techreport{
3D:market08,
   Author = {Yole},
   Title = {Market Trends for 3D Stacking},
   Institution = {Yole Developpement,  http://www.yole.fr},
      Year = {2008} }




@inproceedings{
3D:HJL06,
   Author = {Yu, Hao and Ho, Joanna and He, Lei},
   Title = {Simultaneous power and thermal integrity driven via stapling in 3D ICs},
   BookTitle = {ICCAD},
   Pages = {802-808},
   Year = {2006} }




@article{
3d-ZLR+05,
   Author = {Zeng, A. and Lu, J. and Rose, K. and Gutmann, R.J.},
   Title = {First-order Performance Prediction of Cache Memory with Wafer-level 3D Integration},
   Journal = {IEEE Design and Test of Computers},
   Volume = {22},
   Number = {6},
   Pages = {548- 555},
   Year = {2005} }




@inproceedings{
3D:ZRG04,
   Author = {Zeng, A. Y. and Rose, K. and Gutmann, R. J.},
   Title = {Cache array architecture optimization at deep submicron technologies},
   BookTitle = {Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on },
   Pages = {320-325},
   Year = {2004} }




@inproceedings{
3D:TYS06,
   Author = {Zhang, Tianpei and Zhan, Yong and Sapatnekar, Sachin S.},
   Title = {Temperature-aware routing in 3D ICs},
   BookTitle = {ASPDAC},
   Pages = {309-314},
   Year = {2006} }




@inproceedings{
3D:PYZ+07,
   Author = {Zhou, P. and Ma, Y. and Li, Z. and Dick, R. P. and Shang, L. and Zhou, H. and Hong, X. and Zhou, Q.},
   Title = {3D-STAF: Scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits},
   BookTitle = {ICCAD},
   Year = {2007} }



